Category: Circuit Cellar Articles
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Experimenting with Metastability and Multiple Clocks on FPGAs
NOTE: This article appeared in Issue 293 of Circuit Cellar, back in December 2014. I’ve posted it here for your reading pleasure as well. References to previous articles are for Circuit Cellar Issues, as this was originally written for the print publication. This version differs slightly from the print version – this is my own…
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FPGA Board Design Tips
NOTE: This article appeared in Issue 315 of Circuit Cellar, back in October 2016. I’ve posted it here for your reading pleasure as well. References to previous articles are for Circuit Cellar Issues, as this was originally written for the print publication. This version differs slightly from the print version – this is my own…
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Programmable Logic in Practice
I wrote for Circuit Cellar in a column titled “Programmable Logic in Practice” from 2013-2015. This column detailed various work around FPGAs. The column later became my “Embedded System Essentials” column, which primarily dealt with security issues in embedded systems. The previous domain (programmablelogicinpractice.com) now redirects here. Unfortunately not all posts were transitioned. You can…
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Circuit Cellar 25th Anniversary Edition
I’ve got an article in the 25th-Anniversary edition of Circuit Cellar about the future of FPGAs. If you haven’t got an issue yourself yet, check out their webstore.
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Design a FIR Filter in an FPGA in 30 mins using High Level Synthesis
I’ve been working with Xilinx’s new High Level Synthesis tools built into Vivado. I’m slowly working on posting some more complete tutorials. In the mean-time here is a simple tutorial about making a Finite Impulse Response Filter on a real ADC/DAC board .