Hackaday Project and Latest Circuit Cellar Columns

I had entered my side channel analysis project called ChipWhisperer into the Hackaday Prize. I’m honoured to have been selected as one of five finalists! This means lots more work getting everything ready, but should be exciting.

Since my last post, I’ve also published a few more columns in Circuit Cellar. If you aren’t familiar with my Programmable Logic in Practice column, I post some details of it on my dedicated website. I just posted a video for the Dec 2014 column which includes some experiments with metastability on the Xilinx FPGA. Fun times!

EELive! (ESC) Conference Slides + Programs

See my presentation at EELive? If so you can download the slides from:

And the ISE + Vivado HLS Project from:

You can also check out additional details at the Programmable Logic in Practice post, which includes videos + examples of other uses of HLS.

Programmable Logic in Practice

I’ll now be writing a column coming out every two months in Circuit Cellar about FPGAs. The first issue is now available online with a subscription (www.gotomycc.com) & should also be getting physically to subscribers soon.

Part of this will see another site at http://programmablelogicinpractice.com/ with ‘extra information’ alongside each issue. My first issue deals with using the Integrated Logic Analyzer (ILA) tools available from most vendors.