Tag: short

Hackaday Project and Latest Circuit Cellar Columns

I had entered my side channel analysis project called ChipWhisperer into the Hackaday Prize. I’m honoured to have been selected as one of five finalists! This means lots more work getting everything ready, but should be exciting.

Since my last post, I’ve also published a few more columns in Circuit Cellar. If you aren’t familiar with my Programmable Logic in Practice column, I post some details of it on my dedicated website. I just posted a video for the Dec 2014 column which includes some experiments with metastability on the Xilinx FPGA. Fun times!

EELive! (ESC) Conference Slides + Programs

See my presentation at EELive? If so you can download the slides from:
http://www.newae.com/files/ThinkFastFPGADesignUsing_OFlynn.pdf

And the ISE + Vivado HLS Project from:
http://www.newae.com/files/ThinkFast_FPGA_Files.zip.

You can also check out additional details at the Programmable Logic in Practice post, which includes videos + examples of other uses of HLS.

Programmable Logic in Practice

I wrote for Circuit Cellar in a column titled “Programmable Logic in Practice” from 2013-2015. This column detailed various work around FPGAs. The column later became my “Embedded System Essentials” column, which primarily dealt with security issues in embedded systems.

The previous domain (programmablelogicinpractice.com) now redirects here. Unfortunately not all posts were transitioned. You can find copies of some of my articles if you check the Circuit Cellar tag.