Publications

In-Progress Articles.

<No Pre-Print Articles Available Right Now>

Journal Articles.

Synchronous Sampling and Clock Recovery of Internal Oscillators for Side Channel Analysis.
NoImagevember, 2014.
Authors: Colin O’Flynn, Zhizhang Chen.
Published In: Journal of Cryptographic Engineering
Link to Preprint Version (freely available)
Final Version (might be behind paywall)

Peer-Reviewed Conference Articles.

Side Channel Power Analysis of an AES-256 Bootloader
May 2015Image
Authors: Colin O’Flynn, Zhizhang Chen
Presented In: CCECE 2015
Published In: (IEEE Xplore, proceedings not yet published)
Link to Preprint Version

 

 

ChipWhisperer: An Open-Source Platform for Hardware Embedded Security Research
April 2014Image
Authors: Colin O’Flynn, Zhizhang Chen
Presented In: COSADE 2014
Published In: LNCS
Link to Preprint Version
Final Version on SpringerLink

 

A Case Study of Side-Channel Analysis using Decoupling Capacitor Power Measurement with the OpenADC
ImageOctober 2012
Authors: Colin O’Flynn, Zhizhang Chen
Presented In: Foundations & Practices of Security
Published In: LNCS, Vol 7743
Link to Preprint Version
Final Version on Springerlink
Watch Presentation (with audio)

 

FlexibleIP (FIP): IPv6 Stack for Experimental Work on Low-Power Wireless Networks
ImageSeptember 2012
Authors: Colin O’Flynn
Presented In: IEEE GreenCom 2012
Link to Preprint Version
Final Version on IEEE Xplore
Goto Wiki, Source, etc
Watch Presentation (with audio)

 

Message Denial and Alteration on IEEE 802.15.4 Low-Power Radio Networks

ImageFebruary 2011
Authors: Colin O’Flynn
Presented In: 4th IFIP International Conference on New Technologies, Mobility and Security *Winner, best paper in Security Track*
Link to Preprint Version
Final Version at IEEE XPlore
Download Presentation (with notes)
Watch Presentation (with audio)

FPGA Implementation of a Novel Compensation Technique for EER Amplifiers
ImageMay 2009
Authors: Alex Morash, Colin O’Flynn, Jacek Ilow
Presented At: Communication Networks and Services Research Conference 2009 (CNSR)
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4939133

Workshop / Poster / Tutorials.

Poster: Low-Cost Power Trace Acquisition with OpenADC & Decoupling Capacitor Power Measurement
ImageSept 2012
CHES 2012
Download PDF

 

Poster: Side Channel Analysis
ImageMay 2012
ECE Graduate Conference (Dalhousie)
Download PDF

 

Workshop: Secure Initial Configuration of Resource Constrained Wireless Smart Objects
Image

Sept 2010
SoftCOM 2010 – Workshop Track
Download PDF

 

 

Tutorial: IPv6 For the (Wireless) Masses
ImageMay 2010
Communication Networks and Services Research Conference 2010 (CNSR)
http://doi.ieeecomputersociety.org/10.1109/CNSR.2010.72

 

 

Poster: Making sensor networks IPv6 ready
Image2008
Authors: Mathilde Durvy, Julien Abeillé, Patrick Wetterwald, Colin O’Flynn, Blake Leverett, Eric Gnoske, Michael Vidales, Geoff Mulligan, Nicolas Tsiftes, Niclas Finne, Adam Dunkels
Conference On Embedded Networked Sensor Systems 2008 (SenSys)
http://portal.acm.org/citation.cfm?id=1460412.1460483

Circuit Cellar – Trade Magazine.

Programmable Logic in Practice: Introducing MakeISEhttp://programmablelogicinpractice.com/wp-content/uploads/2015/01/feb2015_thumb.png

February 2015
http://www.programmablelogicinpractice.com

 

 

Programmable Logic in Practice: Metastability and Crossing Clock Domainhttp://programmablelogicinpractice.com/wp-content/uploads/2014/11/dec2014_thumb.png

December 2014
http://www.programmablelogicinpractice.com

 

 

Programmable Logic in Practice: Simple Soft-Core Processors
ImageAugust 2014
http://www.programmablelogicinpractice.com

 

 

 

Programmable Logic in Practice: Partial FPGA Configuration
ImageJune 2014
http://www.programmablelogicinpractice.com

 

 

 

Programmable Logic in Practice: Zynq with the ZedBoard
ImageApril 2014
http://www.programmablelogicinpractice.com

 

 

 

Programmable Logic in Practice: Rapid FPGA Design in C Using High-Level Synthesis
ImageFebruary 2014
http://www.programmablelogicinpractice.com

 

 

 

Programmable Logic in Practice: Hardware Co-Simulation
ImageDecember 2013
http://www.programmablelogicinpractice.com

 

 

 

Programmable Logic in Practice: Integrated Logic Analyzers for DebugImage

October 2013
http://www.programmablelogicinpractice.com

 

 

 

Advanced USB Design Debugging

Image

August 2010, Issue 241

 

 

 

 

Open-Source AVR Development
Image

November 2006, Issue 196

 

 

 

Robust Bootloader for FPGAs
February 2006, Issue 187

Digital Video in an Embedded System

Image

November 2005, Issue 184

 

 

 

 

It’s a SNAP
Image

February 2002, Issue 139

 

 

 

 

Patents

These patents are pledged under the The Open Patent Non-Assertion Pledge (see https://www.google.com/patents/opnpledge/ ).

US Patent 9,429,624: “Synchronous sampling of internal state for investigation of digital systems”.

US Patent application 14/588,959 (no grant yet): “Insertion of Faults into Computer Systems”.

These patents are used in my open-source ChipWhisperer, and were mostly filed to prevent someone (i.e., a large company) from trying to shut down the project by filing similar patents themselves. Committing them to the Google OPN guarantees they can be freely used in open-source projects, and I or someone else cannot later revoke this permission (i.e., even if they were sold or taken over).

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